A View from the Top: A Virtual Prototyping Blog

Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024. The post Why Analog Design Challe...

https://www.synopsys.com/blogs/chip-design/analog-ic-design-tools-snug-panel.html

See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications. The post Want to Mix and Match Dies...

https://www.synopsys.com/blogs/chip-design/ucie-protocol-multi-die-chip.html

Learn about maskless electron beam lithography and see how Multibeam's industry-first e-beam semiconductor lithography system leverages Synopsys software. The post Synopsys and Multibeam Accele...

https://www.synopsys.com/blogs/chip-design/electron-beam-lithography-multibeam.html

We explore Aerospace and Government (A&G) chip design and explain how Silicon Lifecycle Management (SLM) ensures semiconductor reliability for A&G applications. The post SLM Solutions for Missi...

https://www.synopsys.com/blogs/chip-design/ag-chip-design-silicon-lifecycle-management.html

Learn what gate-all-around (GAA) transistors are, explore the switch from fin field-effect transistors (FinFETs), and see the impact on SoC design & EDA tools. The post What You Need to Know Ab...

https://www.synopsys.com/blogs/chip-design/what-are-gate-all-around-gaa-transistors.html

See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services. The post Cisco Accelerates Project ...

https://www.synopsys.com/blogs/chip-design/library-characterization-eda-cloud.html

Learn what IR Drop is, explore the chip design tools and techniques involved in power network analysis, and see how it accelerates the IC design flow. The post Leveraging Early Power Network An...

https://www.synopsys.com/blogs/chip-design/ir-drop-power-network-analysis.html

See how Achronix used our physical verification tools to accelerate the SoC design and verification flow, boosting chip design productivity w/ cloud-based EDA. The post Achronix Achieves 5X Fas...

https://www.synopsys.com/blogs/chip-design/soc-physical-verification-tool-achronix.html

Learn how we're working with PCI-SIG to transition PCIe to optical interfaces and explore our demo of the PCIe 7.0 standard over fiber optics with OpenLight. The post The Future of PCIe Is Opti...

https://www.synopsys.com/blogs/chip-design/pcie-over-fiber-optics-pcie-7.html

Explore the impact of AI-powered EDA tools on semiconductor design with key takeaways from our AI-driven chip design panel at SNUG Silicon Valley 2024. The post Can AI-Driven Chip Design Meet t...

https://www.synopsys.com/blogs/chip-design/generative-ai-chip-design-panel.html

See how Mentium designed and taped out their AI accelerator chip, created for use in deep space with NASA, using our SaaS cloud EDA tools and IP resources. The post Mentium Accelerates Tape-out...

https://www.synopsys.com/blogs/chip-design/cloud-based-eda-software-ai-accelerator-mentium.html

CEO Sassine Ghazi explains how AI, silicon, and software-defined systems fuel innovation in the era of pervasive intelligence, at SNUG Silicon Valley 2024. The post Powering Innovation in the E...

https://www.synopsys.com/blogs/chip-design/pervasive-intelligence-snug-2024.html

Learn how semiconductor workforce development programs build the talent pipeline in Southeast Asia, including collaborations with the government and academia. The post Building the Semiconducto...

https://www.synopsys.com/blogs/chip-design/southeast-asia-semiconductor-workforce-development.html

Learn how we're providing semiconductor training through workforce development programs, addressing the semiconductor labor shortage around the world. The post Empowering the Next Generation of...

https://www.synopsys.com/blogs/chip-design/semiconductor-training-workforce-development-program.html

We're tackling the tech talent shortage by expanding STEM education through university partnerships, engineering internships, and joint curriculum development. The post Tackling the Global Tech...

https://www.synopsys.com/blogs/chip-design/tackling-tech-talent-shortage-with-stem.html