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How to save all device terminal voltage waveforms in spectre?
I have a large netlist and when I generate a list of specific device terminals such as below, the waveforms are saved. save top.foo.bar.foo_bar.my_ckt.nmos_a.g save top.foo.bar.foo_bar.my_c...
How to setup ADE Explorer to save last N runs automatically
How to setup ADE Explorer to save last N runs automatically? With ADE-L the following line in .cdsinit would save the last 5 runs. envSetVal("asimenv.misc" "numberOfSavedRuns" 'int 5) Thank...
Modifying the ADE Assembler "Open MATLAB" command
Hello Currently, when I click on "Open MATLAB" via the ADE Assembler, another matlab version is opened (an older version that doesn't support Mixed-Signal Analyzer). I can fix this if I had a...
Trouble netlising using analogLib Mosfet symbol
I am trying to simulate a custom mosfet model utilising the analogLib Mosfet symbol. The circuit should form a simple inverter. While the schematic looks good (see picture) the netlist does not...
Flash ADC
Hello everyone, I need to test a 3 bit Flash ADC in ADE Explorer. For an analog input (such as a sinewave) it gives in output a digital bit stream. How can I process this signal/data? I have ...
Virtuoso - align instances to match pin order
Hello, I would like to align levelshifts to match pinout order from a hard IP block. There are various levelshifter types being used so they need to be in the correct order. In the past I h...
skill to get csh date time format instead of getCurrentTime from skill
i will like to record the time while executing my callback. However, i can get "Apr 3016:00:35 2024" with getCurrentTime. i prefer to have format like "20240430_160038" with "date +%Y%m%d_%H%...
Extract x and y Vector from srrWave
The goal is to extract the x and y vectors from an srrWave. In a first step from a single design point, but in a later stage ideally from a parameter sweep simulation. The current approach to get...
How to use device models with spectre circuit simulator
Hi, I'm trying to use HiSIM2 with ADE-L. I read "Spectre Circuit Simulator Components and Device Models Reference". I believe the model is supported by cadence. However, I got the error be...
ocnPrint to File
Using `ocnPrint` to write a waveform to a file, I am unable to locate the file it writes to if it even writes to the file. I have tried relative and absolute paths and searched through the simula...
"Ignore Instances" not completely ignoring capacitor instance effects
I'm simulating a CS-DAC, and was experimenting with the effect of an extra capacitor on the tail node. To do that, I placed an ideal cap from analogLib on the node, and then measured in three...
Maestro - design variables form fetching deleted variables
I'm not sure how & why design variables is still fetching old variables which are deleted & replaced with values. Simulation will run fine but, when I click 'copy from cellview', old variables sh...
Virtuoso IC6.1.8-64b.500.31 Crashing
After running several heavy simulations through ADE Assembler, the Virtuoso tool occasionally crashes, displaying the "Fatal Application Error". The design is quite large, at about 3GB, so the ne...
LVS Mismatch
Hello, I added an LVS-cleaned design block at the top level with other blocks and components. At the top level, it is claiming again mismatched instances of the previously LVS cleaned block. ...
Auto placer not updating PR boundary
Hi All, Could you take a look at the figure? I am trying to make the PR boundary on the left layout more compact and similar to the right. It seems the auto placer can do it, but sometimes it s...
Load Pull simulations without PortAdapter
Hi I would like to run load pull simulations with harmonic balance analysis. I do not have access to PortAdapter from rfExamples library. So I would like to run it using analoglib port with hb ...
Difference srrWave and drWave
Going through the OCEAN Reference Manual the ocnPrint function mentions drWave as the waveform identifier. Checking the identifier of the results of my simulation, I get srrWave. What is the diff...
Refer to output expression by name, when name contains whitespaces and special characters
Dear all, IC6.1.4 and especially Virtuoso Studio 23.1 allows to name output expressions in ADE and then used those named output expressions in other expressions by simply using its name (refere...
Is spc file available in ADE Explorer/Assembler?
Hello, I am using an internal simulator as a shell around spectre and the input I have to give at least in older versions of Virtuoso was a .spc file. This was done by loading the ADE-L state, ...
Skill Pcell "undefined function pow" at eval during LVS
Hello, I've been working on a PCell in skill for several days and it is not a piece of cake! I was able to fix most of my problems alone, but this time I really don't understand... For a litt...
Transient Noise Analysis (fmin)
Hello, I try to set the fmin via Tran Noise Options to 1Hz. However, fmin is limited to 1/simulationTime no matter what I set. First of all, if I run AC noise analysis, I know that within the f...
Snap grid setup
Hi All, I would like to setup grids, Right I don't see any snap pattern option on grids palette. This is how I want I am using cadence 6.1.8 version. please let me know how do I setup t...
Plotting Template in ADE Assembler and ADE Explorer
My virtuoso verison is: sub-version IC6.1.8-64b.500.27 I created two ADE Explorer cases and for each of them I saved a Plotting Template named differently such that no Plotting Template na...
Fetching the operating point of a transistor in VerilogA with "$simprobe" always returns 0
I have the following schematic: "VerilogA_Test" block is written so that it takes the transconductance gm of the transistor MN0 and prints its value. The VerilogA code is the following: > ...
VSR: How to avoid router to route over floating fill
Hi, I am trying to resolve an issue where router is routing a metal layer directly on top of a floating fill layer of the same layer. Are there any constraints to set to avoid this. This is cau...